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Up to this point, you have only worked with the X and Y or horizontal and vertical positioning of objects Layers control the Z position or stacking of objects It is essential to understand the basics of working with layers when creating Flash content

#import <Cocoa/Cocoa.h> @class LOLView.h; @interface LOLmaker_AppDelegate : NSObject { IBOutlet LOLView *lolView; NSImage *image; NSString *text; }

Creating layers in Flash is fairly simple At the top of the screen, you will see the Timeline Near the bottom-left corner of the Timeline is the Insert Layer button (it looks like a page being turned) Click the Insert Layer button to create a new layer

Then, edit LOLmaker_AppDelegate.m, adding the following line near the top so that we can use the LOLView class:

.

Deleting layers is just as easy as creating them A few buttons to the right of the Insert Layer button, you will see a button that looks like a trash can That is the Delete Layer button To delete a layer, select the layer you want to delete You know a layer is selected when the layer becomes highlighted Then, click the Delete Layer button to delete the layer

#import "LOLView.h"

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bottom_btnonRollOver = function():Void { hammer_mc_rotation = rotateAmt; nail_mc_y += bashAmt; rotateAmt -= bashAmt / 7; if(nail_mc_y >= nailIn) { nail_mc_y = nailIn; } }

Add the following lines to the @implementation section to complete the properties:

bottom_btnonRollOver = function():Void { hammer_mc_rotation = rotateAmt; nail_mc_y += bashAmt; rotateAmt -= bashAmt / 7; if(nail_mc_y >= nailIn) { nail_mc_y = nailIn; bottom_btnenabled = false; } }

Pipelining is a very effective means of improving processor performance, and there are strong motivations for employing deep pipelines A deeper pipeline increases the number of pipeline stages and reduces the number of logic gate levels in each pipeline stage The primary benefit of deeper pipelines is the ability to reduce the machine cycle time and hence increase the clocking frequency During the 1980s most pipelined microprocessors had four to six pipeline stages Contemporary high-end microprocessors have clocking frequencies in the multiple-gigahertz range, and pipeline depths have increased to more than 20 pipeline stages Pipelines have gotten not only deeper, but also wider, such as superscalar processors As pipelines get wider, there is increased complexity in each pipeline stage, which can increase the delay of each pipeline stage To maintain the same clocking frequency, a wider pipeline will need to be made even deeper There is a downside to deeper pipelines With a deeper pipeline the penalties incurred for pipeline hazard resolution can become larger Figure 223 illustrates what can happen to the ALU, load, and branch penalties when a pipeline becomes wider and much deeper Comparing the shallow and the deep pipelines, we see that the ALU penalty increases from zero cycles to one cycle, the load penalty increases from one cycle to four cycles, and most importandy, the branch penalty goes from three cycles to eleven cycles With increased pipeline penalties, the average CPI increases The potential performance gain due to the higher clocking frequency of a deeper pipeline can be ameliorated by the increase of CPI To ensure overall performance improvement with a deeper pipeline, the increase in clocking frequency must exceed the increase in CPI There are two approaches that can be used to mitigate the negative impact of the increased branch penalty in deep pipelines; see Figure 224 Among the three pipeline penalties, the branch penalty is the most severe because it spans all the front-end pipeline stages With a mispredicted branch, all the instructions in the front-end pipeline stages must be flushed The first approach to reduce the branch.

@synthesize image; @synthesize text;

all the way in Cool! All that you have left to do now is to make a way to play the game multiple times

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