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In addition to the error control codes, optical storage systems employ modulation codes to improve the signal-to-noise ratio (SNR) of the readout signals and nally to reduce the BER of the readout data. Typical modulation codes applied to the holographic memories are the balanced codes, the low-pass ltering codes [BURR97], and the sparse modulation codes [KING00]. A balanced code is a block code of length n whose codewords have a constant Hamming weight bn=2c, where bxc shows the largest integer less than or equal to x. These codes are effective in reducing the errors that occur in the binarization stage of the readout gray-scale signal. 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At certain processing and storage conditions, the content of HMF recorded in foods is a balance between formation and degradation reactions (Fig. 2.5.3). On the other hand, HMF is a volatile substance that can be lost during baking or roasting. In principle, HMF can react further by decarboxylation, oxidation, dehydration, and polycondensation reactions (130, 153 155). Dehydration furnishes levulinic and formic acids. Small amounts of 5-hydroxymethyl-2-furan carboxylic acid (HMFA) are formed upon the oxidation of HMF. Durham et al. (90) have reported the formation of 5-hydroxymethylfuroic acid and furan-2,5dicarboxylic acid by HMF decomposition under autoclaving conditions. 2(2 hydroxyacetyl)-furan is formed as a side-product of fructose degradation and by condensation of both compounds in the presence of only catalytic amounts of amino compounds, leading to the formation of colored products. Self-condensation of HMF affords the corresponding ether. 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The oating-point unit in the chip is checked by a residue-check code, and the majority of the data- ow circuits also maintain parity check, which adds error-detection capabilities. The microprocessor chip includes an interface control circuit block which controls the interface between the processor chip and the outside cache memories or the main memories. The bit / byte error control codes presented in s 4 through 6 are employed for these memories, and therefore encoder and decoder circuits are included in the control circuit block. Hence the errors exist in the outside cache or the main memory, or the errors in the interface circuits, such as bus-line circuits connected with these memories, are corrected or detected at the processor chip. Also in recent microprocessors, the SEC-DED codes and the SEC-DED-SbED codes are extensively applied to the inside bus-line circuits and to the inside cache memories. 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